EK-K7-KC705-CES-G-J【PDF 2/62 页】KINTEX-7 FPGA KC705 EVAL KIT

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Kintex-7 FPGAs Data Sheet: DC and AC Switching Characteristics

Table 1: Absolute Maximum Ratings (1) (Cont’d)

Symbol

V MGTAVTTRCAL

V IN

I DCIN-FLOAT

I DCIN-MGTAVTT

I DCIN-GND

I DCOUT-FLOAT

I DCOUT-MGTAVTT

Description

Analog supply voltage for the resistor calibration circuit of the GTX transceiver

column

Receiver (RXP/RXN) and Transmitter (TXP/TXN) absolute input voltage

DC input current for receiver input pins DC coupled RX termination = floating

DC input current for receiver input pins DC coupled RX termination = V MGTAVTT

DC input current for receiver input pins DC coupled RX termination = GND

DC output current for transmitter pins DC coupled RX termination = floating

DC output current for transmitter pins DC coupled RX termination = V MGTAVTT

Min

–0.5

–0.5

–

–

–

–

–

Max

1.32

1.26

14

12

6.5

14

12

Units

V

V

mA

mA

mA

mA

mA

XADC

V CCADC

V REFP

XADC supply relative to GNDADC

XADC reference input relative to GNDADC

–0.5

–0.5

2.0

2.0

V

V

Temperature

Maximum soldering temperature for Pb-free component bodies

T STG

T SOL

Storage temperature (ambient)

Maximum soldering temperature for Pb/Sn component bodies (6)

–65

–

–

150

+220

+260

°C

°C

°C

T j

Maximum junction

temperature (6)

–

+125

°C

Notes:

1.

2.

3.

4.

5.

6.

Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied.

Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability.

The lower absolute voltage specification always applies.

For I/O operation, refer to the 7 Series FPGAs SelectIO Resources User Guide ( UG471 ).

The maximum limit applies to DC signals. For maximum undershoot and overshoot AC specifications, see Table 4 and Table 5 .

See Table 10 for TMDS_33 specifications.

For soldering guidelines and thermal considerations, see the 7 Series FPGA Packaging and Pinout Specification ( UG475 ).

Table 2: Recommended Operating Conditions (1)(2)

Symbol

Description

Min

Typ

Max

Units

FPGA Logic

V CCINT (3)

V CCBRAM (3)

V CCAUX

V CCO (4)(5)

V CCAUX_IO (6)

V IN (7)

I IN (9)

V CCBATT (10)

Internal supply voltage

For -2L (0.9V) devices: internal supply voltage

Block RAM supply voltage

For -2L (0.9V) devices: block RAM supply voltage

Auxiliary supply voltage

Supply voltage for 3.3V HR I/O banks

Supply voltage for 1.8V HP I/O banks

Auxiliary supply voltage when set to 1.8V

Auxiliary supply voltage when set to 2.0V

I/O input voltage

I/O input voltage (when V CCO = 3.3V) for V REF and differential I/O

standards except TMDS_33 (8)

Maximum current through any pin in a powered or unpowered bank when

forward biasing the clamp diode.

Battery voltage

0.97

0.87

0.97

0.87

1.71

1.14

1.14

1.71

1.94

–0.20

–0.20

–

1.0

1.00

0.90

1.00

0.90

1.80

–

–

1.80

2.00

–

–

–

–

1.03

0.93

1.03

1.03

1.89

3.465

1.89

1.89

2.06

V CCO + 0.2

2.625

10

1.89

V

V

V

V

V

V

V

V

V

V

V

mA

V

DS182 (v2.8) March 4, 2014

Product Specification

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